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Atmel AT91SAM9G20


AT91SAM7Sxxx  AT91SAM7Xxxx  AT91SAM7XCxxx  AT91SAM7SExxx  AT91SAM7A3 
AT91SAM9260  AT91SAM9263  AT91RM9200  AT91SAM9G20  AT91SAM3U  SAM4S16B 
All Supported Chips 

AT91SAM9G20

 Supported by the Crossware Development Suite for ARM Professional Edition

 Graphical Code Creation Wizards:

  • A/D Converter (ADC)
  • Chip configuration
  • Periodic interval timer (PIT)
  • Ports (PIOA, PIOB and PIOC)
  • Power management controller (PMC)
  • Reset controller
  • SDRAM controller (SDRAMC)
  • Static memory controller (SMC)
  • Serial peripheral interfaces (SPI0 and SPI1)
  • Synchronous serial controller (SSC)
  • System interrupt
  • Timer/counters
  • Two wire interface (TWI)
  • Universal synchronous/asynchronous receiver/transmitters (USART0, USART1, USART2, USART3, USART4 and USART5)
  • USB device port (UDP)
  • Watchdog timer

 Context menu Code Creation Wizards:

  • A/D Converter (ADC)
  • Advanced interrupt controller (AIC)
  • Chip configuration
  • Debug unit
  • Error corrected code (ECC)
  • Ethernet MAC (EMAC)
  • Image sensor interface
  • Bus matrix
  • Multimedia card interface (MCI)
  • Periodic interval timer (PIT)
  • Ports (PIOA, PIOB and PIOC)
  • Power management controller (PMC)
  • Reset controller
  • Real time timer (RTT)
  • SDRAM controller (SDRAMC)
  • Shutdown controller
  • Static memory controller (SMC)
  • Serial peripheral interfaces (SPI0 and SPI1)
  • Synchronous serial controller (SSC)
  • System interrupt
  • Timer/counters
  • Two wire interface (TWI)
  • Universal synchronous/asynchronous receiver/transmitters (USART0, USART1, USART2, USART3, USART4 and USART5)
  • USB device port (UDP)
  • Watchdog timer

 Source level ARM instruction set simulation

 Simulation of the memory management unit (MMU) and fast context switch extension (FCSE)

 Peripheral simulation:

  • PLL
  • Advanced interrupt controller
  • Ports
  • Timer/counters
  • Universal synchronous/asynchronous receiver/transmitters (USART0, USART1, USART2, USART3, USART4 and USART5)

 Source level on-chip debugging with Jaguar USB JTAG interface

  • Automatically detects boot mode and configures SRAM or programs flash
  • Debugging with the memory management unit (MMU) and fast context switch extension (FCSE) enabled