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NXP LPC2290, LPC2290/01, LPC2292, LPC2292/01, LPC2294 and LPC2294/01


LPC2101/2/3  LPC2104/5/6  LPC21x9  LPC2114/24  LPC2194  LPC213x  LPC214x 
LPC2212/14  LPC2210/20  LPC229x  LPC23xx  LPC2478  LPC29xx  LPC1768 
All Supported Chips 

LPC2294/01

 Supported by the Crossware Development Suite for ARM Pathfinder, Developer and Professional Editions

 Graphical Code Creation Wizards:

  • A/D converter (ADC)
  • Controller area network (Central controller, acceptance filter and CAN1, CAN2, CAN3 and CAN4)
  • External memory controller
  • External interrupts 0, 1, 2 and 3
  • Inter-integrated circuit (I2C)
  • Memory accelerator
  • Phase locked loop (PLL)
  • Ports
  • Pulse width modulation (PWM)
  • Real time clock
  • Serial peripheral interfaces (SPI0 and SPI1)
  • Synchronous serial port (SSP)
  • Timers 0 and 1
  • Universal asynchronous receiver/transmitters (UART0 and UART1)
  • Watchdog timer

 Context menu Code Creation Wizards:

  • A/D converter (ADC)
  • Controller area network (Central controller, acceptance filter and CAN1, CAN2, CAN3 and CAN4)
  • External memory controller
  • External interrupts 0, 1, 2 and 3
  • Inter-integrated circuit (I2C)
  • Memory accelerator
  • Phase locked loop (PLL)
  • Ports
  • Pulse width modulation (PWM)
  • Real time clock
  • Serial peripheral interfaces (SPI0 and SPI1)
  • Synchronous serial port (SSP)
  • Timers 0 and 1
  • Universal asynchronous receiver/transmitters (UART0 and UART1)
  • Vectored interrupt controller (VIC)
  • Watchdog timer

 Source level ARM instruction set simulation

 Peripheral simulation:

  • PLL
  • Vectored interrupt controller
  • Ports
  • Timers
  • External interrupts
  • Universal synchronous/asynchronous receiver/transmitters
  • Controller area network
  • Watchdog timer

 Source level on-chip debugging with Jaguar USB JTAG interface


LPC2292/01

 Supported by the Crossware Development Suite for ARM Pathfinder, Developer and Professional Editions

 Graphical Code Creation Wizards:

  • A/D converter (ADC)
  • Controller area network (Central controller, acceptance filter and CAN1 and CAN2)
  • External memory controller
  • External interrupts 0, 1, 2 and 3
  • Inter-integrated circuit (I2C)
  • Memory accelerator
  • Phase locked loop (PLL)
  • Ports
  • Pulse width modulation (PWM)
  • Real time clock
  • Serial peripheral interfaces (SPI0 and SPI1)
  • Synchronous serial port (SSP)
  • Timers 0 and 1
  • Universal asynchronous receiver/transmitters (UART0 and UART1)
  • Watchdog timer

 Context menu Code Creation Wizards:

  • A/D converter (ADC)
  • Controller area network (Central controller, acceptance filter and CAN1 and CAN2)
  • External memory controller
  • External interrupts 0, 1, 2 and 3
  • Inter-integrated circuit (I2C)
  • Memory accelerator
  • Phase locked loop (PLL)
  • Ports
  • Pulse width modulation (PWM)
  • Real time clock
  • Serial peripheral interfaces (SPI0 and SPI1)
  • Synchronous serial port (SSP)
  • Timers 0 and 1
  • Universal asynchronous receiver/transmitters (UART0 and UART1)
  • Vectored interrupt controller (VIC)
  • Watchdog timer

 Source level ARM instruction set simulation

 Peripheral simulation:

  • PLL
  • Vectored interrupt controller
  • Ports
  • Timers
  • External interrupts
  • Universal synchronous/asynchronous receiver/transmitters
  • Controller area network
  • Watchdog timer

 Source level on-chip debugging with Jaguar USB JTAG interface


LPC2294

 Supported by the Crossware Development Suite for ARM Pathfinder, Developer and Professional Editions

 Graphical Code Creation Wizards:

  • A/D converter (ADC)
  • Controller area network (Central controller, acceptance filter and CAN1, CAN2, CAN3 and CAN4)
  • External memory controller
  • External interrupts 0, 1, 2 and 3
  • Inter-integrated circuit (I2C)
  • Memory accelerator
  • Phase locked loop (PLL)
  • Ports
  • Pulse width modulation (PWM)
  • Real time clock
  • Serial peripheral interfaces (SPI0 and SPI1)
  • Timers 0 and 1
  • Universal asynchronous receiver/transmitters (UART0 and UART1)
  • Watchdog timer

 Context menu Code Creation Wizards:

  • A/D converter (ADC)
  • Controller area network (Central controller, acceptance filter and CAN1, CAN2, CAN3 and CAN4)
  • External memory controller
  • External interrupts 0, 1, 2 and 3
  • Inter-integrated circuit (I2C)
  • Memory accelerator
  • Phase locked loop (PLL)
  • Ports
  • Pulse width modulation (PWM)
  • Real time clock
  • Serial peripheral interfaces (SPI0 and SPI1)
  • Timers 0 and 1
  • Universal asynchronous receiver/transmitters (UART0 and UART1)
  • Vectored interrupt controller (VIC)
  • Watchdog timer

 Source level ARM instruction set simulation

 Peripheral simulation:

  • PLL
  • Vectored interrupt controller
  • Ports
  • Timers
  • External interrupts
  • Universal synchronous/asynchronous receiver/transmitters
  • Controller area network
  • Watchdog timer

 Source level on-chip debugging with Jaguar USB JTAG interface


LPC2292

 Supported by the Crossware Development Suite for ARM Pathfinder, Developer and Professional Editions

 Graphical Code Creation Wizards:

  • A/D converter (ADC)
  • Controller area network (Central controller, acceptance filter and CAN1 and CAN2)
  • External memory controller
  • External interrupts 0, 1, 2 and 3
  • Inter-integrated circuit (I2C)
  • Memory accelerator
  • Phase locked loop (PLL)
  • Ports
  • Pulse width modulation (PWM)
  • Real time clock
  • Serial peripheral interfaces (SPI0 and SPI1)
  • Timers 0 and 1
  • Universal asynchronous receiver/transmitters (UART0 and UART1)
  • Watchdog timer

 Context menu Code Creation Wizards:

  • A/D converter (ADC)
  • Controller area network (Central controller, acceptance filter and CAN1 and CAN2)
  • External memory controller
  • External interrupts 0, 1, 2 and 3
  • Inter-integrated circuit (I2C)
  • Memory accelerator
  • Phase locked loop (PLL)
  • Ports
  • Pulse width modulation (PWM)
  • Real time clock
  • Serial peripheral interfaces (SPI0 and SPI1)
  • Timers 0 and 1
  • Universal asynchronous receiver/transmitters (UART0 and UART1)
  • Vectored interrupt controller (VIC)
  • Watchdog timer

 Source level ARM instruction set simulation

 Peripheral simulation:

  • PLL
  • Vectored interrupt controller
  • Ports
  • Timers
  • External interrupts
  • Universal synchronous/asynchronous receiver/transmitters
  • Controller area network
  • Watchdog timer

 Source level on-chip debugging with Jaguar USB JTAG interface