Supported by the Crossware Development Suite for ARM Developer and Professional Editions
Graphical Code Creation Wizards:
Context menu Code Creation Wizards:
- ADC0
- ADC1
- ADC2
- ADC3
- DMA
- FlexBus
- FTFE
- FTM0
- FTM1
- FTM2
- FTM3
- GPIOA
- GPIOB
- GPIOC
- GPIOD
- GPIOE
- GPIOF
- MCG
- NVIC
- System oscillator 0
- System oscillator 1
- Programmable delay block
- PIT
- PMC
- PORTA
- PORTB
- PORTC
- PORTD
- PORTE
- PORTF
- SIM
- SIM Low Power Logic
- SMC
- UART 0
- UART 1
- UART 2
- UART 3
- UART4
- UART5
- VREF
- Watchdog
jState Code Creation Wizards:
- ADC0
- ADC1
- ADC2
- ADC3
- DMA
- FlexBus
- FTFE
- FTM0
- FTM1
- FTM2
- FTM3
- GPIOA
- GPIOB
- GPIOC
- GPIOD
- GPIOE
- GPIOF
- MCG
- NVIC
- System oscillator 0
- System oscillator 1
- Programmable delay block
- PIT
- PMC
- PORTA
- PORTB
- PORTC
- PORTD
- PORTE
- PORTF
- SIM
- SIM Low Power Logic
- SMC
- UART 0
- UART 1
- UART 2
- UART 3
- UART4
- UART5
- VREF
- Watchdog
Cortex-M4 core simulation
- Cortex-M4 instruction set
- DSP instruction set simulation
- FPU instruction set simulation
- Nested vectored interrupt controller (NVIC) including SysTick
- Bit-banding of SRAM
Register views:
- Core
- FPU
- NVIC
- GPIO
- PORT
- Watchdog
- ADCs
- PDB
- SIM
- FTM0
- FMT1
- FTM2
- FTM3
- FTFE
- FB
- OSC
- PIT
- MCG
Source level on-chip debugging with Jaguar USB JTAG interface
