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MICROPROCESSOR INSTRUCTION REFERENCE->FTST

Test Floating-Point Operand

Compatibility: ColdFire chips with a floating-point unit (FPU)

Source Operand Tested -> FPCC

    

Assembler Syntax:	FTST.fmt <ea>
	FTST.D FPy

Format: Byte (B), Word (W), Long (L), Single-precision (S), Double-precision (D)

Converts the source operand to double-precision (if necessary) and sets the condition code bits in accordance with the result.

Floating-Point Status Register:

N	Set if operand is negative;else cleared
Z	Set if operand is zero;else cleared
I	Set if operand is infinity;else cleared
NAN	Set if operand is a NAN;else cleared
BSUN	Always cleared
INAN	Set if the input is not-a-number; else cleared
IDE	Set if the input is a denormalised number; else cleared
OPERR	Always cleared
OVFL	Always cleared
UNFL	Always cleared
DZ	Always cleared
INEX	Set if the infinitely-precise mantissa of the intermediate result has more significant bits than can be represented exactly in the selected rounding precision; or if the input is a denormalised number and the IDE exception is disabled; or if the result overflowed; or if the result underflowed and the underflow exception is disabled; else cleared

    

	Allowable Addressing Modes

	Dn,FPn
	(An),FPn
	(An)+,FPn
	-(An),FPn
	(d16,An),FPn
	(d16,PC),FPn