Crossware

Table of Contents        Previous topic       Next topic       

C/C++ COMPILER->Disabling and Enabling ARM Core Interrupts

The ARM core IRQ and FIQ interrupts can be disabled and enabled using the intrinsic functions __DI(), __EI(), __DIEX() and __EIEX().

The header file intrinsic.h contains prototypes for these intrinsic functions.

__DI() disables IRQ and FIQ interrupts.  The compiler generates code to set both the I and F bits in the current program status register.

  MRS    Rn,cpsr
  ORR    Rn,Rn,#$C0
  MSR    cpsr_c,Rn

__EI() enables IRQ and FIQ interrupts.  The compiler generates code to clear both the I and F bits in the current program status register.

  MRS    Rn,cpsr
  BIC    Rn,Rn,#$C0
  MSR    cpsr_c,Rn

__DIEX() disables IRQ and FIQ interrupts.  The compiler generates code to set both the I and F bits in the current program status register.  It is slightly different to __DI() in that the original value of the current program status register is saved in a register for later use by __EIEX().

  MRS    Rn,cpsr
  ORR    Rd,Rn,#$C0
  MSR    cpsr_c,Rd

__EIEX() restores the value of the current program status register to the value that it had before __DIEX() was called.  A single instruction is generated using the register allocated to __DIEX().  __EIEX() must be in the same function as __DIEX() and the programmer must ensure that __EIEX() is not executed before __DIEX() otherwise the register will not have been initialized.

  MSR    cpsr_c,Rn

where Rn is the same register as the Rn used by __DIEX() and so holds the original value of cpsr.

On Cortex cores, only a single instruction is required to either enable and disable interrupts.

__DI() and  __DIEX() both disable interrupts using:

  CPSID    i

__EI() and  __EIEX() both enable interrupts using:

  CPSIE    i