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MICROPROCESSOR INSTRUCTION REFERENCE->XRL

XRL    Bitwise Logical Exclusive OR

Assembler mnemonic: OR <destination>,<source>

XRL performs a bitwise logical exclusive OR between the source and destination variable and stores the result in the destination variable.

Formats:
    

Description	Mnemonic	Bytes	Cycles

a	Exclusive Or Immediate Data:	XRL A,#<data>	2	1
b	Exclusive Or Indirect Address:	XRL A,@Ri	1	1
c	Exclusive Or Register:	XRL A,Rn	1	1
d	Exclusive Or Memory:	XRL A,<direct address>	2	1
e	Exclusive Or Immediate to memory:	XRL <direct addr>,#<data>	3	2
f	Exclusive Or Accumulator to memory:	XRL <direct address>,A	2	1

where Ri is R0 or R1 and Rn is R0 - R7 and '/' means logical complement of address bit.

PSW:	C	AC	F0	RS1	RS0	OV	P
a-d	N/A	N/A	N/A	N/A	N/A	N/A	*
e,f	N/A	N/A	N/A	N/A	N/A	N/A	N/A

N/A: Not affected.