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MICROPROCESSOR INSTRUCTION REFERENCE->XCHD

XCHD               Exchange Digit

This instruction exchanges the low order nibble of the accumulator (bits 3-0) with that of the internal RAM location indirectly addressed by the specified register.  The high order nibbles of each register are unaffected.  In general this is used when the low order nibbles are representing hexadecimal or BCD digits).


Formats:
    

Description	Mnemonic	Bytes	Cycles

Exchange Indirect Address and Accumulator:

XCHD A,@Ri

1

1

where Ri is R0 or R1
    

PSW:	C	AC	F0	RS1	RS0	OV	P
	N/A	N/A	N/A	N/A	N/A	N/A	*

(N/A: Not affected)