Crossware

Table of Contents        Previous topic       Next topic       

MICROPROCESSOR INSTRUCTION REFERENCE->BFSET

BFSET       Test Bit Field and Set

Compatibility: 68020 family only.


1s -> <bit field> of Destination

Assembler Syntax:    BFSET <ea>{offset:width}

Unsized

Sets the condition codes according to the value in a bit field at the specified effective address, then sets each bit in the field.

The field offset and the field width select the field.  The field offset specifies the starting bit of the field.  The field width determines the number of bits in the field.

Condition Codes:
N    Set if the most significant bit of the field is set, otherwise cleared
Z    Set if all bits of the field are zero, otherwise cleared
V    Always cleared
C    Always cleared
X    Not affected

This instruction is not supported by CPU32 based microcontrollers.

    
Allowable Addressing Modes
    
BFSETDn{offset:width}
BFSET(An){offset:width}
BFSET(d16,An){offset:width}
BFSET(d8,An,Xn){offset:width}
BFSET(bd,An,Xn){offset:width}
BFSET([bd,An,Xn],od){offset:width}
BFSET([bd,An],Xn,od){offset:width}
BFSET(xxx).W{offset:width}
BFSET(xxx).L{offset:width}
where:

offset specifies the starting bit of the field and is either a data register Dn or an expression having a value from 0 to 31.

width specifies the width of the field and is either a data register Dn or an expression having a value from 0 to 31 where 1 to 31 specify field widths of 1 to 31 and 0 specifies a field width of 32.