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MICROPROCESSOR INSTRUCTION REFERENCE->BFINS
BFINS Insert Test Bit
Compatibility: 68020 family only.
Dn -> <bit field> of Destination
Assembler Syntax: BFINS Dn,<ea>{offset:width}
Unsized
Inserts a bit field taken from the low-order bits of the specified data register into the bit field at the specified effective address.
The field offset and the field width select the field. The field offset specifies the starting bit of the field. The field width determines the number of bits in the field.
Condition Codes:
N Set if the most significant bit of the field is set, otherwise cleared
Z Set if all bits of the field are zero, otherwise cleared
V Always cleared
C Always cleared
X Not affected
This instruction is not supported by CPU32 based microcontrollers.
Allowable Addressing Modes |
BFINS | Dn,Dn{offset:width} | |
BFINS | Dn,(An){offset:width} | |
BFINS | Dn,(d16,An){offset:width} | |
BFINS | Dn,(d8,An,Xn){offset:width} | |
BFINS | Dn,(bd,An,Xn){offset:width} | |
BFINS | Dn,([bd,An,Xn],od){offset:width} | |
BFINS | Dn,([bd,An],Xn,od){offset:width} | |
BFINS | Dn,(xxx).W{offset:width} | |
BFINS | Dn,(xxx).L{offset:width} |