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MICROPROCESSOR INSTRUCTION REFERENCE->ADD

ADD A,s  Add accumulator and operand s

A <- A + s

Flags
    
SSet if result -ve, else cleared
ZSet if result zero, else cleared
HSet if half carry, else cleared
P/VSet if overflow else cleared
NCleared
CSet if carry, else cleared
    
s:No ofMTusec @
bytescyclesstates2 MHz
    
r1142
n2273.5
(HL)1273.5
(IX+d)35199.5
(IY+d)35199.5

r may be one of A,B,C,D,E,H,L
n is 1 byte of data

ADD HL,ss  Add HL and operand ss
ADD IX,pp  Add IX and operand ss
ADD IY,rr  Add IY and operand ss

HL <- HL+ss : IX <- IX+pp : IY <- IY+rr

Flags
    
SNot affected
ZNot affected
HSet by carry from bit 11,else res.
P/VNot affected  
NCleared
CSet if carry from bit 15,else res.
    
No ofMTusec @
bytescyclesstates2 MHz
    
HL,ss13115.5
IX,pp24157.5
IY,rr24157.5
ss may be one of BC, DE, HL, SP
pp may be one of BC, DE, IX, SP
rr may be one of BC, DE, IY, SP