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MICROPROCESSOR INSTRUCTION REFERENCE->ADC HL ss

ADC HL,ss  Add HL and register pair ss with carry

HL <- HL + ss + CY


Flags
    

S	Set if result -ve, else cleared
Z	Set if result zero, else cleared
H	Unknown
P/V	Set if overflow else cleared
N	Cleared
C	Set if carry, else cleared

No of	M	T	usec @
bytes	cycles	states	2 MHz

2

4

15

7.5

ss may be one of BC, DE, HL or SP