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MICROPROCESSOR INSTRUCTION REFERENCE->OTDM

OTDM  Output memory indirectly addressed by HL to port (C) decrementing HL and C and decrementing B

(C) <- (HL) : HL <- HL-1
C <- C-1    : B <- B-1
                        C to A0-A7
                        0 to A8-A15

Flags
    
SSet if result -ve, else cleared
ZSet if B becomes 0, else cleared
HSet if half carry, else cleared
P/VSet if parity even, else cleared
NSet to MSB of data
CSet if carry, else cleared
    
No ofMTusec @
bytesCyclesstates2 MHz
    
26147
HD64180 only      <Return> for OTDMR