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MICROPROCESSOR INSTRUCTION REFERENCE->Program Control Instructions
| Instruction | Operand Syntax | Operand Size | Operation |
| Bcc | <label> | 8,16 | If Condition True then PC+d->PC |
| Scc | Dn | 8 | If Condition True then 1's -> Destination else 0's -> Destination |
| BRA | <label> | 8,16 | PC+d->PC |
| BSR | <label> | 8,16 | SP-4->SP; PC->(SP); PC+d->PC |
| JMP | <ea> | none | Destination->PC |
| JSR | <ea> | none | SP-4->SP; PC->(SP); Destination->PC |
| NOP | none | none | PC+2->PC (Integer Pipeline Synchronised) |
| TRAPF | none #<data> | none 16 32 | PC+2->PC PC+4->PC PC+6->PC |
| RTS | none | none | (SP)->PC; SP+4->SP |
| TST | (ea> | 8,16,32 | Set Integer Condition Codes |
| Branch Instruction | Set Instruction | Condition |
| BCC | SCC | Carry Clear |
| BLS | SLS | Lower or same |
| BCS | SCS | Carry Set |
| BLT | SLT | Less than |
| BEQ | SEQ | Equal |
| BMI | SMI | Minus |
| SF | Never | |
| BNE | SNE | Not equal |
| BGE | SGE | Greater than or equal |
| BPL | SPL | Plus |
| BGT | SGT | Greater than |
| ST | Always | |
| BHI | SHI | Higher |
| BVC | SVC | Overflow clear |
| BLE | SLE | Less than or equal |
| BVS | SVS | Overflow set |