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MICROPROCESSOR INSTRUCTION REFERENCE->Program Control Instructions


InstructionOperand
Syntax
Operand
Size
Operation
Bcc<label>8,16If Condition True then PC+d->PC
SccDn8If Condition True then 1's -> Destination else 0's -> Destination
BRA<label>8,16PC+d->PC
BSR<label>8,16SP-4->SP; PC->(SP); PC+d->PC
JMP<ea>noneDestination->PC
JSR<ea>noneSP-4->SP; PC->(SP); Destination->PC
NOPnonenonePC+2->PC (Integer Pipeline Synchronised)
TRAPFnone
#<data>
none
16
32
PC+2->PC
PC+4->PC
PC+6->PC
RTSnonenone(SP)->PC; SP+4->SP
TST(ea>8,16,32Set Integer Condition Codes
    
Branch
Instruction
Set
Instruction
Condition
BCCSCCCarry Clear
BLSSLSLower or same
BCSSCSCarry Set
BLTSLTLess than
BEQSEQEqual
BMISMIMinus
SFNever
BNESNENot equal
BGESGEGreater than or equal
BPLSPLPlus
BGTSGTGreater than
STAlways
BHISHIHigher
BVCSVCOverflow clear
BLESLELess than or equal
BVSSVSOverflow set