Crossware

Table of Contents        Previous topic       Next topic       

MICROPROCESSOR INSTRUCTION REFERENCE->MACL

MACL    Multiply and Accumulate with Register Load

Compatibility:    Starting with 5206e.

    
Assembler Syntax:MACL.W Ry.<UL>,Rx<UL>,<ea>,Rw
MACL.W Ry.<UL>,Rx<UL>,<shift>,<ea>,Rw
MACL.W Ry.<UL>,Rx<UL>,<shift>,<ea>&,Rw
MACL.L Ry,Rx,<ea>,Rw
MACL.L Ry,Rx,<shift>,<ea>,Rw
MACL.L Ry,Rx,<shift>,<ea>&,Rw
where <shift> is either << or >>, <UL> indicates that either a U or L must be used and & produces a masked operation.

Size:    Word, Long

Multiply the 16 bit or 32 bit operands together to produce a 32 bit result and add the result optionally shifted one bit to the left or right to the contents of the MAC accumulator ACC.  The result is stored back into the accumulator.

In parallel with this operation, a 32 bit operand is fetched from the memory location defined by <ea> and loaded into the destination Rw.  If the mask addressing mode is used, the lower order word of <ea> is ANDed with the MAC mask register.

If 16 bit operands are used, they may be located in the upper or lower word of the register and U or L must be used to specify upper word or lower word respectively.

MAC status register:

OMC Not affected
S/U Not affected
NSet if the most significant bit of the result is set, else cleared
ZSet if the result is zero, else cleared
VSet if an overflow generated,  else unchanged
CAlways cleared

     
Allowable Addressing Modes <ea>
    
(An)
(An)+
-(An)
(d16,An)