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MICROPROCESSOR INSTRUCTION REFERENCE->MULU

MULU   Unsigned Multiply

Destination x Source -> Destination

    

Assembler Syntax:	MULU.W <ea>,Dn	16 x 16 -> 32
	MULU.L <ea>,Dn	32 x 32 -> 32

Size:  Word, Long

Multiplies two unsigned operands yielding an unsigned result.

In the word form, the multiplier and multiplicand are both word operands, and the result is a long-word operand.  A register operand is the low-order word; the upper word of the register is ignored.  All 32 bits of the product are saved in the destination data register.  

In the long form, the multiplier and multiplicand are both long-word operands, and the result is a long word.

Condition Codes:

N    Set if most significant bit of result is set, else cleared
Z    Set if result zero, else cleared
V    Always cleared
C    Always cleared
X    Not affected

    

Allowable Addressing Modes

	Word	Long

	Dn,Dn		Dn,Dn
	(An),Dn		(An),Dn
	(An)+,Dn		(An)+,Dn
	-(An),Dn		-(An),Dn
	(d16,An),Dn		(d16,An),Dn
	(d8,An,Xn),Dn
	(xxx).W,Dn
	(xxx).L,Dn
	#(data),Dn
	(d16,PC),Dn
	(d8,PC,Xn),Dn