Table of Contents        Previous topic       Next topic       

MICROPROCESSOR INSTRUCTION REFERENCE->ANL

ANL    Bitwise Logical AND

Assembler Mnemonic: ANL <destination>,<source>

ANL performs a bitwise logical AND between the source and destination variables and stores the result in the destination variable.

Formats:
    

Description	Mnemonic	Bytes	Cycles

a And Immediate Data:	ANL A,#<data>	2	1
b And Indirect Address:	ANL A,@Ri	1	1
c And Register:	ANL A,Rn	1	1
d And Memory:	ANL A,<direct address>	2	1
e And Carry Flag:	ANL C,<bit address>	2	2
f And Complement of Carry Flag:	ANL C,/<bit addresss>	2	2
g And Immediate to memory:	ANL <direct address>,#<data>	3	2
h And Accumulator to memory:	ANL <direct address>,A	2	1

where Ri is R0 or R1 and Rn is R0 - R7 and '/' means logical complement of address bit.
    

PSW:	C	AC	F0	RS1	RS0	OV	P
a-d	N/A	N/A	N/A	N/A	N/A	N/A	*
e,f	*	N/A	N/A	N/A	N/A	N/A	N/A
g,h	N/A	N/A	N/A	N/A	N/A	N/A	N/A

(N/A: Not affected)