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MICROPROCESSOR INSTRUCTION REFERENCE->ORI to SR

ORI to SR Inclusive OR Immediate with Status Register

Compatibility: 68000, 68010, 68020 and CPU32 families.

S 'OR' Immediate Data -> Destination

Assembler Syntax: ORI #<data>,SR

Size: Word

Performs an inclusive OR operation of the immediate operand and the contents of the status register and stores the result in the status register. All implemented bits of the status register are affected.

Condition Codes:

X Set if bit 4 of immediate operand is 1, else unchanged

N Set if bit 3 of immediate operand is 1, else unchanged

Z Set if bit 2 of immediate operand is 1, else unchanged

V Set if bit 1 of immediate operand is 1, else unchanged

C Set if bit 0 of immediate operand is 1, else unchanged

X	Set if bit 4 of immediate operand is 1, else unchanged
N	Set if bit 3 of immediate operand is 1, else unchanged
Z	Set if bit 2 of immediate operand is 1, else unchanged
V	Set if bit 1 of immediate operand is 1, else unchanged
C	Set if bit 0 of immediate operand is 1, else unchanged