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MICROPROCESSOR INSTRUCTION REFERENCE->MOVES
MOVES Move Address Space
Compatibility: 68010, 68020 and CPU32 families only.
Rn -> Destination (DFC)
Source (SFC) -> Rn
Moves the operand from the specified general register to a location within the address space specified by the destination function code (DFC) register or from the address space specified by the source function code (SFC) register to the specified general register.
Assembler Syntax: | MOVES Rn,<ea> |
| MOVES <ea>,Rn |
Condition Codes: Not Affected
Size: Byte, Word or Long
This is a privileged instruction
| Allowable Addressing Modes |
|
| MOVES | (An),Rn | MOVES | Rn,(An) |
| MOVES | (An)+,Rn | MOVES | Rn,(An)+ |
| MOVES | -(An),Rn | MOVES | Rn,-(An) |
| MOVES | (d16,An),Rn | MOVES | Rn,(d16,An) |
| MOVES | (d8,An,Xn),Rn | MOVES | Rn,(d8,An,Xn) |
| MOVES | (bd,An,Xn),Rn 2 | MOVES | Rn,(bd,An,Xn) 2 |
| MOVES | ([bd,An,Xn],od),Rn 1 | MOVES | Rn,([bd,An,Xn],od) 1 |
| MOVES | ([bd,An],Xn,od),Rn 1 | MOVES | Rn,([bd,An],Xn,od) 1 |
| MOVES | (xxx).W,Rn | MOVES | Rn,(xxx).W |
| MOVES | (xxx).L,Rn | MOVES | Rn,(xxx).L |
where Rn is either An or Dn
1 68020 only
2 68020 and CPU32 only
Note: For MOVES An,(An)+ and MOVES An,-(An) the value stored is undefined.