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MICROPROCESSOR INSTRUCTION REFERENCE->LPSTOP
LPSTOP Low Power Stop
Compatibility: CPU32 only.
This is a privileged instruction.
If supervisor state:
Immediate Data -> SR
Interrupt Mask -> External Bus Interface (EBI)
STOP
else
TRAP
Execution resumes when a trace, interrupt or reset exception occurs.
Assembler Syntax: LPSTOP #<data>
Size: Word
The immediate operand is moved into the entire status register, the program counter is advanced to point to the next instruction, and the processor stops fetching and executing instructions.
Condition Codes: Set according to the immediate operand.