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MICROPROCESSOR INSTRUCTION REFERENCE->CHK2

CHK2    Check Register against Bounds

Compatibility: 68020 and CPU32 only

If Rn < lower bound or Rn > upper bound then TRAP

Assembler Syntax:    CHK2 <ea>,Rn

<ea> - data only

Size:    Byte, Word, Long

The value in register Rn is compared with the lower bound and upper bound specified by the effiective address. (The lower bound is followed by the upper bound.)

If the register is a data register, and the size is byte or word, then only the bytes or words are compared. If the register is an address register and the size is byte or word, then the lower and upper bounds are sign extended to 32 bits before being compared with the 32 bits of the register. For signed comparisons, the arithmetically smaller value should be used as the lower bound. For unsigned comparisons, the logically smaller value should be used as the lower bound.

Condition Codes:

N    Undefined
Z    Set if Rn is equal to either bound, else cleared
V    Undefined
C    Set if Rn is out bound, else cleared
X    Not affected



Allowable Addressing Modes


CHK2 (An),Rn

CHK2 (d16,An),Rn

CHK2 (d8,An,Xn),Rn

CHK2 (bd,An,Xn),Rn

CHK2 ([bd,An,Xn],od),Rn 1

CHK2 ([bd,An],Xn,od),Rn 1

CHK2 (xxx).W,Rn

CHK2 (xxx).L,Rn

CHK2 (d16,PC),Rn

CHK2 (d8,PC,Xn),Rn

CHK2 (bd,PC,Xn),Rn

CHK2 ([bd,PC,Xn],od),Rn 1

CHK2 ([bd,PC],Xn,od),Rn 1

	CHK2	(An),Rn
	CHK2	(d16,An),Rn
	CHK2	(d8,An,Xn),Rn
	CHK2	(bd,An,Xn),Rn
	CHK2	([bd,An,Xn],od),Rn 1
	CHK2	([bd,An],Xn,od),Rn 1
	CHK2	(xxx).W,Rn
	CHK2	(xxx).L,Rn
	CHK2	(d16,PC),Rn
	CHK2	(d8,PC,Xn),Rn
	CHK2	(bd,PC,Xn),Rn
	CHK2	([bd,PC,Xn],od),Rn 1
	CHK2	([bd,PC],Xn,od),Rn 1