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MICROPROCESSOR INSTRUCTION REFERENCE->BFCLR

BFCLR      Test Bit Field and Clear

Compatibility: 68020 family only

0s -> <bit field> of Destination

Assembler Syntax:    BFCLR <ea>{offset:width}

Unsized


Sets condition codes according to the value in a bit field at the specified effective address, and clears the field.

The field offset and field width select the field.  The field offset specifies the starting bit of the field.  The field width determines the number of bits in the field.

Condition Codes:
N    Set if the most significant bit of the field is set, otherwise cleared
Z    Set if all bits of the field are zero, otherwise cleared
V    Always cleared
C    Always cleared
X    Not affected


This instruction is not supported by CPU32 based microcontrollers.

    

	Allowable Addressing Modes

	BFCLR	Dn{offset:width}
	BFCLR	(An){offset:width}
	BFCLR	(d16,An){offset:width}
	BFCLR	(d8,An,Xn){offset:width}
	BFCLR	(bd,An,Xn){offset:width}
	BFCLR	([bd,An,Xn],od){offset:width}
	BFCLR	([bd,An],Xn,od){offset:width}
	BFCLR	(xxx).W{offset:width}
	BFCLR	(xxx).L{offset:width}

where:

offset specifies the starting bit of the field and is either a data register Dn or an expression having a value from 0 to 31.

width specifies the width of the field and is either a data register Dn or an expression having a value from 0 to 31 where 1 to 31 specify field widths of 1 to 31 and 0 specifies a field width of 32.