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MICROPROCESSOR INSTRUCTION REFERENCE->ASR
ASR Arithmetic Shift Right
Compatibility: 68000, 68010, 68020, CPU32 families
Destination shifted by <count> -> Destination
sign bit -> OPERAND -> C
-> X
Assembler Syntax: | ASR Dx,Dy |
| ASR #<data>,Dy |
| ASR <ea> |
<ea> - memory alterable only
Dx contains shift count
Immediate shift data may be 1 - 8
Memory can be shifted only 1 bit
Size: Byte, Word, Long except if Memory Shift when only Word Allowed
Arithmetically shifts the bits of the operand right. The carry bit receives the last bit shifted out of the operand.
Condition Codes:
N Set if most significant bit of result is set, else cleared
Z Set if result zero, else cleared
V Set if the most significant bit is changed at any time during shift operation, else clear
C Set according to last bit shifted out of operand, cleared for a shift count of zero
X Set according to last bit shifted out of operand, unaffected by a shift count of zero
| Allowable Addressing Modes |
|
| ASR | Dx,Dy |
| ASR | #(data),Dy |
| ASR | (An) |
| ASR | (An)+ |
| ASR | -(An) |
| ASR | (d16,An) |
| ASR | (d8,An,Xn) |
| ASR | (bd,An,Xn) 2 |
| ASR | ([bd,An,Xn],od) 1 |
| ASR | ([bd,An],Xn,od) 1 |
| ASR | (xxx).W |
| ASR | (xxx).L |
1 68020 only
2 68020 and CPU32 only