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MICROPROCESSOR INSTRUCTION REFERENCE->AND

AND    Logical AND

Compatibility: 68000, 68010, 68020, CPU32 families

Destination 'AND' Source -> Destination

Assembler Syntax:	AND <ea>,Dn
	AND Dn,<ea>

Source <ea> - data
Destination <ea>  - alterable memory

Size:  Byte, Word or Long

Performs an AND operation of the source operand with the destination operand and stores the result in the destination location.

Condition Codes:

N    Set if most significant bit of result is set, else cleared
Z    Set if result zero, else cleared
V    Always cleared
C    Always cleared
X    Not affected

    

	Allowable Addressing Modes

	<ea>,Dn		Dn,<ea>

	AND	Dn,Dn
	AND	(An),Dn	AND	Dn,(An)
	AND	(An)+,Dn	AND	Dn,(An)+
	AND	-(An),Dn	AND	Dn,-(An)
	AND	(d16,An),Dn	AND	Dn,(d16,An)
	AND	(d8,An,Xn),Dn	AND	Dn,(d8,An,Xn)
	AND	(bd,An,Xn),Dn 2	AND	Dn,(bd,An,Xn) 2
	AND	([bd,An,Xn],od),Dn 1	AND	Dn,([bd,An,Xn],od) 1
	AND	([bd,An],Xn,od),Dn 1	AND	Dn,([bd,An],Xn,od) 1
	AND	(xxx).W,Dn	AND	Dn,(xxx).W
	AND	(xxx).L,Dn	AND	Dn,(xxx).L
	AND	#(data),Dn
	AND	(d16,PC),Dn
	AND	(d8,PC,Xn),Dn
	AND	(bd,PC,Xn),Dn 2
	AND	([bd,PC,Xn],od),Dn 1
	AND	([bd,PC],Xn,od),Dn 1

1   68020 only
2   68020 and CPU32 only