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MICROPROCESSOR INSTRUCTION REFERENCE->LSRD

LSRD    Logical shift right double accumulator

0 ->  ACC A  ->  ACC B  -> C
   b7     b0  b7     b0

Condition Code Register:

C  Set to bit 0 of operand (Acc B)
V  Set if N 'eor' C = 1 after execution, else cleared
Z  Set if result Zero, else cleared
N  Reset Always
I  Not affected
H  Not affected


    

Addressing mode	Assembler syntax
Implied:	LSRD