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MICROPROCESSOR INSTRUCTION REFERENCE->PSH

PSH     Push registers designated by immediate byte onto stack
PSHU
PSHS

Set bits of immediate byte to push required registers as follows:
    

b7	b6	b5	b4	b3	b2	b1	b0
PC	U/S	Y	X	DP(DPR)	B	A	CC(CCR)

Push order: PC to CC

U cannot be pushed onto S stack
S cannot be pushed onto U stack

Condition Code Register:

Not affected

    

Addressing mode	No of cycles	No of bytes
Immed.:	5+	2