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MICROPROCESSOR INSTRUCTION REFERENCE->LD (16 bit)
LD Load Register from Memory
LDD
LDS
LDU D <- M:M+1 or S <- M:M+1 or
LDX U <- M:M+1 or X <- M:M+1 or
LDY Y <- M:M+1
Condition Code Register
H Not affected
N Set if result Negative, else cleared
Z Set if result Zero, else cleared
V Always cleared
C Not affected
Addressing mode | No of cycles | No of bytes |
Immediate: | 3 (4) | 3 (4) |
Direct: | 5 (6) | 2 (3) |
Extended: | 6 (7) | 3 (4) |
Index/Indirect: | 5+ (6+) | 2+ (3+) |