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MICROPROCESSOR INSTRUCTION REFERENCE->CLIF

CLIF    Clear Regular and Fast Interrupt Masks

This is a 6800-like opcode which is translated into:

         ANDCC #&AF

Condition Code Register:

E  Not affected
F  Cleared Always
H  Not affected
I  Cleared Always
N  Not affected
Z  Not affected
V  Not affected
C  Not affected

    
Addressing modeNo of cyclesNo of bytes
Implied32