AT91SAM9263
|
 Supported by the Crossware ARM Development Suite
Graphical Code Creation Wizards:
- Controller area network (CAN)
- Chip configuration
- Pulse width modulator (PWM)
- Periodic interval timer (PIT)
- Ports (PIOA, PIOB, PIOC, PIOD and PIOE)
- Power management controller (PMC)
- Reset controller
- SDRAM controllers (SDRAMC0 and SDRAMC1)
- Static memory controllers (SMC0 and SMC1)
- Serial peripheral interfaces (SPI0 and SPI1)
- Synchronous serial controllers (SSC0 and SSC1)
- System interrupt
- Timer/counters
- Two wire interface (TWI)
- Universal synchronous/asynchronous receiver/transmitters (USART0, USART1 and USART2)
- USB device port (UDP)
- Watchdog timer
Context menu Code Creation Wizards:
- 2D graphics controller
- AC97 audio interface
- Advanced interrupt controller (AIC)
- Controller area network (CAN)
- Chip configuration
- Debug unit
- DMA controller (DMAC)
- Error corrected code (ECC0 and ECC1)
- Ethernet MAC (EMAC)
- Image sensor interface
- LCD controller
- Bus matrix
- Multimedia card interfaces (MMC0 and MMC1)
- Pulse width modulator (PWM)
- Periodic interval timer (PIT)
- Ports (PIOA, PIOB, PIOC, PIOD and PIOE)
- Power management controller (PMC)
- Reset controller
- Real time timers (RTT0 and RTT1)
- SDRAM controllers (SDRAMC0 and SDRAMC1)
- Shutdown controller
- Static memory controllers (SMC0 and SMC1)
- Serial peripheral interfaces (SPI0 and SPI1)
- Synchronous serial controllers (SSC0 and SSC1)
- System interrupt
- Timer/counters
- Two wire interface (TWI)
- Universal synchronous/asynchronous receiver/transmitters (USART0, USART1 and USART2)
- USB device port (UDP)
- Watchdog timer
Source level ARM instruction set simulation
Simulation of the memory management unit (MMU) and fast context switch extension (FCSE)
Peripheral simulation:
- PLL
- Advanced interrupt controller
- Ports
- Timer/counters
- Universal synchronous/asynchronous receiver/transmitters (USART0, USART1 and USART2)
Source level on-chip debugging with Jaguar USB JTAG interface
- Automatically detects boot mode and configures SRAM or programs flash
- Debugging with the memory management unit (MMU) and fast context switch extension (FCSE) enabled
|
